Google announced TPU 8tx for confidential AI inference and the dual-chip TPU 8i Max for long-context agents. What is new, what is GA today, and what is still missing.

On November 9, Google added two more systems to its eighth-generation TPU family: TPU 8tx, built for confidential inference, and TPU 8i Max, a two-chip package for very long context windows. Amin Vahdat, Google's SVP and Chief Technologist for AI and Infrastructure, introduced them in a post titled "Our newest TPUs: 8tx and 8i Max, built for the agentic era". "This is the first time we have introduced four TPU systems in a single year," the company wrote.
Neither one is new silicon. TPU 8tx uses the same silicon as TPU 8t, the training chip Google showed at Cloud Next in April. TPU 8i Max is two TPU 8i chips on one package. What changed is the host, the network and the packaging around them, and each change targets a problem enterprise buyers keep hitting: running models on data they are not allowed to move, and the memory wall that agents with huge contexts run into.

The expanded eighth-generation lineup: TPU 8t, TPU 8i, TPU 8tx and TPU 8i Max. Image: Google.
Google's own summary of the lineup is now TPU 8t for scale-up training, TPU 8i for low-latency reasoning, TPU 8tx for confidential computing and TPU 8i Max for "massive context windows and the highest compute density per rack." Google says TPUs now have "nearly 100 customers."
TPU 8tx pairs TPU 8t silicon with 5th Generation AMD EPYC CPU hosts. According to Google Cloud's announcement, it "builds security directly into the hardware layer, keeping sensitive data and model weights protected and isolated even while in active use." That last clause is the point. Encrypting data at rest and in transit is routine. Protecting it while the accelerator is computing on it is what confidential computing adds, and on Google Cloud that has so far meant CPUs or Nvidia GPUs. TPU 8tx is the first TPU system Google has pitched this way.

TPU 8tx, built for hardware-level confidential compute on private data. Image: Google.
It borrows Boardfly, the low-latency network Google built for TPU 8i, and Google claims "up to 2x lower latency compared to TPU 8t with a near-zero performance penalty" from the security layer. The target customer is a regulated enterprise or government running frontier or proprietary models next to its most sensitive data. Google says teams can fine-tune on private data, distill large models into smaller ones and train agents with reinforcement learning "all without needing to migrate sensitive data between separate clusters."
There is an on-premises angle too. Mark Lohmeyer, Google Cloud's VP and GM of AI and computing infrastructure, said in a press briefing reported by Data Center Knowledge that select customers will be able to deploy TPU 8tx in their own data centers. Google's blog only says, more generally, that customers can now deploy TPUs directly into their own facilities.
For TPU 8i Max, Google "took two low-latency TPU 8i chips and combined them onto a single package," giving "double the compute, double the SRAM and double the HBM bandwidth of TPU 8i." The pitch is aimed squarely at agent workloads: "When dozens of AI agents work together across an entire software codebase or hours of video at once, memory bandwidth quickly becomes the bottleneck." Lohmeyer called it "adding more lanes to the highway."

A standard TPU board next to TPU 8i Max, which puts two TPU 8i chips on each package. Image: Google.
Google did not publish per-package figures. Applying its "double" to the April per-chip specs for TPU 8i gives the numbers below. Treat the right-hand column as arithmetic, not a spec sheet.
| Per package | TPU 8i (Google, April) | TPU 8i Max (derived, 2x) |
|---|---|---|
| Peak FP4 compute | 10.1 PFLOPs | about 20.2 PFLOPs |
| On-chip SRAM | 384 MB | about 768 MB |
| HBM bandwidth | 8,601 GB/s | about 17.2 TB/s |
| HBM capacity | 288 GB | not stated by Google |
The capacity row is blank on purpose. Google has not given one, and the figure attributed to the briefing in one press report does not square with two 288 GB chips. Wait for a spec sheet before sizing a model to it.
The other claim is density. Because TPU 8i Max "fits twice the silicon within the existing rack footprint," Google says operators get more compute per square foot and per watt.
The hardware cannot be bought yet, but some of the software can be used today. Google open-sourced TPU Sync, which it calls "the model-state layer for TPU clusters." It treats chip HBM, host DRAM, shared storage and the network as one memory hierarchy, moving large KV caches off the chip, streaming context between separate prefill and decode nodes, and syncing reinforcement-learning weights. Google says it cuts KV transfer latency and time to first token by more than 90%.
Cloud Pathways, the Google DeepMind runtime behind Gemini, is now generally available on GKE. GKE dynamic slicing is also GA: it uses optical circuit switching to merge or split TPU slices on the fly, and Google claims up to 5x faster job startup and up to 4.5x faster fault recovery. In October Google open-sourced TorchTPU, so PyTorch code and Hugging Face models run natively on TPUs, with TPU backends for vLLM and SGLang.
| Announced | Status as of November 10, 2026 |
|---|---|
| TPU 8tx, TPU 8i Max | Announced; no price, regions or availability date |
| Cloud Pathways on GKE | Generally available |
| GKE dynamic slicing | Generally available |
| TPU Sync | Open source |
| XLA Serving Engine | Open source; serves across TPUs, GPUs and CPUs |
| TPU agent suite (Claude Code, Cursor, Google Antigravity) | Preview |
| Agent Compute Engine | Announced; suspends and resumes idle sessions |
Google also says its vLLM-TorchTPU stack posted "state-of-the-art price-performance marks" on the InferenceX and AgentX benchmarks, but it gave no figures. The same goes for every multiplier above: they are Google's numbers, and none has been independently tested.
For a bank, hospital group or government agency, TPU 8tx is the one to watch. Today a team that needs hardware-isolated inference on Google Cloud is looking at confidential VMs on CPUs or Nvidia GPUs. TPU 8tx would let the same team fine-tune, distill and serve on one isolated system, and possibly in its own building. IDC group VP Dave McCarthy put it plainly: "If Google can come out with a strong confidential compute story, it kind of gives them a little bit of an edge."
For long-context and multi-agent inference, the bottleneck is memory, not math. TPU 8i Max doubles bandwidth per package and TPU Sync moves the KV cache off-chip when it does not fit.
For PyTorch shops, the switching cost from Nvidia keeps dropping. TorchTPU plus vLLM and SGLang backends means a team can try TPUs without rewriting models in JAX. That is the real challenge to Nvidia here, more than any single chip.
Who can ignore this for now: anyone who needs new capacity this quarter, and anyone on Nvidia with no regulatory pressure. Neither new system can be ordered, and nothing in the announcement forces a move off a working CUDA stack.
Google has not announced pricing, regions or a general-availability date for TPU 8tx or TPU 8i Max. Its April posts said TPU 8t and 8i would be generally available later in 2026, and the company points interested customers to its TPU interest form. Capacity may not stay a Google Cloud exclusive either: Oracle has said it will offer Google TPUs to Oracle Cloud Infrastructure customers.
Google says AlphaChip and Gemini now produce chip layouts "in hours rather than weeks," and it is taking TPUs to stranger places, as its Project Suncatcher satellite launch showed. The next thing to look for is a price list for 8tx, because that will show whether confidential inference costs extra.
